Bringing Machine Learning (ML) to the very "edge" of the physical world where sensing and data collection take place is a major trend in the coming era of machine intelligence. This is also fueled by new use cases and applications and significant economic value creation across numerous platforms and industries.
Based on the progress to-date, there are strong reasons to believe that the future of ML will be "tiny". Whereas cloud-based machine learning evolves at an astronomic pace, development and deployment of ML at the very edge remains a technological challenge constrained by compute, memory, energy, network bandwidth and data privacy and security limitations. This is especially true for battery operated devices and always-on use cases and applications.
The tinyML Summit is a gathering of experts actively working on developing and commercializing Machine Learning for extreme energy efficient applications (on the order of few mW power consumption), designed to help drive the field of smart embedded sensors and systems forward. The Summit will holistically cover all key aspects on tinyML, grouped into the three "pillars": (i) dedicated hardware, (ii) special algorithms and network development and power efficient software, and (iii) ultralow power system designs and sensors of different modalities and applications.
The initial event is for a relatively small group of expert-level attendees from the industry and academia invited based on recommendations and reviews (including poster submissions) by the organizing committee. This diverse group of researches and practitioners will review the state-of-art of tinyML from different angles and work together on setting the directions for the ecosystem and agenda for future Summits.
information to come
BabbleLabs and Cognite Ventures
Experts from the industry, academia and government labs (worldwide) actively working in the tinyML field are encouraged to submit a one page abstract in the MS Word and Adobe PDF formats. The abstract should clearly state:
Showing demos at the poster session is a plus. Abstracts and poster presentations are considered in the three "pillar" areas: Hardware and Architecture, System and Algorithms, and Software and Applications.
Abstracts will be reviewed by the committee on an ongoing basis (monthly) with the final submission deadline on January 30, 2019. Authors will be notified accordingly during review period.
Please send to email@example.com
There have been no room block arrangements at any hotel. The types and prices of properties vary greatly depending on what are you choose to stay. This link will provide you with many choices. For the week of March 18 the prices range from $130 to $600. On the left of the listings you may filter to put in your minimum/maximum price range, cancellation policies, etc.
Dr. Evgeni Gousev is a Senior Director of Engineering in Qualcomm Research. He leads HW R&D org in the Silicon Valley Center and is also responsible for developing ultra low power embedded computing platform, including always on machine vision AI technology. He has been with Qualcomm Technologies, Inc. since 2005 after joining from IBM T.J. Watson Research Center where he drove projects in the field of advanced silicon technologies.
From 1993 to 1998, Dr. Gousev held academic professorship appointments with Rutgers University and Hiroshima University (1997). Evgeni holds a M.S. degree in Applied Physics and a Ph.D. in Solid-State Physics. He has co-edited 24 books and published 163 papers and is an inventor on more than 60 issued and filed patents.
Pete Warden is the technical lead of the TensorFlow mobile and embedded team at Google, and was previously CTO of Jetpac (acquired in 2014).
Ian Bratt is a Distinguished Engineer at ARM, where he leads the Machine Learning Technology group within the ML business unit. Recently, Ian's team defined the architecture for ARM's family of Machine Learning Processors and has been responsible for multiple ML related improvements to the ARM IP roadmap.
Before working in machine learning, Ian worked as an architect on several generations of ARM Mali GPUs, during a high-growth period which culminated in ARM partners shipping over 1B Mali GPUs in 2016.
Prior to ARM, Ian worked at the pioneering multicore startup, Tilera. Ian has worked on NPUs, CPUs, GPUs, memory systems and SoC architecture. He holds an S.M. from MIT and has 23 granted US patents.
Kurt's research at University of California, Berkeley, focuses on computational problems in Deep Learning. In particular, Kurt has worked to reduce the training time of ImageNet to minutes and, with the SqueezeNet family, to develop a family of Deep Neural Networks suitable for mobile and IoT applications.
Before joining Berkeley as a Full Professor in 1998, Kurt was CTO and SVP at Synopsys. Kurt's contributions to Electronic Design Automation were recognized at the 50th Design Automation Conference where he was noted as a Top 10 most cited author, as an author of a Top 10 most cited paper, and as one of only three people to have won four Best Paper Awards at that conference. Kurt was named a Fellow of the IEEE in 1996.
Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies.
Dr. Murmann's research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012.
He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the faculty director of the Stanford SystemX Alliance and Stanford's System Prototyping Facility. He is a Fellow of the IEEE.
Chris is a Silicon Valley entrepreneur and technologist, now co-founder and CEO of BabbleLabs, a deep learning technology company focused on speech. Most recently, he has led Cognite Ventures, a specialized analysis and investment company for deep learning start-ups. Prior to Cognite, he served as CTO for Cadence’s IP Group.
Chris joined Cadence after its acquisition of Tensilica, the company he founded in 1997 to develop extensible processors. He led Tensilica as CEO and later, CTO, to develop one of the most prolific embedded processor architectures.
Before that he was VP and GM of the Design Reuse Group at Synopsys. Chris was a pioneer in developing RISC architecture and helped found MIPS Computer Systems. He holds an MSEE and PhD in electrical engineering from Stanford and a BA in physics from Harvard. He holds more than 40 US and international patents. He was named an IEEE Fellow in 2015 for his work in development of microprocessor technology.
Marian Verhelst is an associate professor at the MICAS laboratories (MICro-electronics And Sensors) of the Electrical Engineering Department of KU Leuven, Belgium. Her research focuses on embedded machine learning, hardware accelerators, self-adaptive circuits and systems, and low-power embedded sensing and processing.
She received a Ph.D. from KU Leuven in 2008, was a visiting scholar at the Berkeley Wireless Research Center (BWRC) of UC Berkeley in 2005, and worked as a research scientist at Intel Labs, Hillsboro OR, from 2008 till 2011.
Marian is a member of the DATE conference executive committee and was a member of the ESSCIRC and ISSCC TPCs and of the ISSCC executive committee.
Marian is an SSCS Distinguished Lecturer, was a member of the Young Academy of Belgium an associate editor for TCAS-II and JSSC and a member of the STEM advisory committee to the Flemish Government. Marian currently holds a prestigious ERC Starting Grant from the European Union.